RISC-V

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RISC-V (pronounced "risk-five") is a license-free, modular, extensible instruction set architecture (ISA).

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Geekbench 6.4 introduces support for RISC-V Vector Extensions (RVV) (www.geekbench.com)

submitted 3 weeks ago* (last edited 3 weeks ago) by JRepin@lemmy.ml to c/riscv@lemmy.ml

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Geekbench 6.4 introduces support for RISC-V Vector Extensions, boosting the performance of workloads that leverage SIMD instructions when run on RISC-V CPUs that implement RVV.

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[–] JRepin@lemmy.ml 1 points 3 weeks ago

Looks like the new version with RVV support improves the benchmark score quite a bit. My BananaPi BPI-F3 gets about 80% higher score than with previous version of Geekbench.